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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Java processor</span></span>
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<p>A <b>Java processor</b> is the implementation of the <a href="Java_virtual_machine" title="Java virtual machine">Java virtual machine</a> (JVM) in hardware. In other words, the <a href="Java_bytecode" title="Java bytecode">Java bytecode</a> that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a <a href="High-level_language_computer_architecture" title="High-level language computer architecture">high-level language computer architecture</a>, and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<sup id="cite_ref-Binder_1-0" class="reference"><a href="#cite_note-Binder-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> However, as of 2017, embedded Java is no longer common and no realtime Java chip vendors exist.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup>
</p>
<div class="mw-heading mw-heading2"><h2 id="Implementations">Implementations</h2></div>
<p>There are several research Java processors tested on <a href="Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a>, including:
</p>
<ul><li><a href="PicoJava" title="PicoJava">picoJava</a> was the first attempt to build a Java processor, by <a href="Sun_Microsystems" title="Sun Microsystems">Sun Microsystems</a>. Its successor picoJava-II was freely available under the <a href="Sun_Community_Source_License" title="Sun Community Source License">Sun Community Source License</a>,<sup id="cite_ref-Binder_1-1" class="reference"><a href="#cite_note-Binder-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> and is still available from some archives.</li>
<li>jHISC<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> provides hardware support for object-oriented functions</li>
<li><a href="Java_Optimized_Processor" title="Java Optimized Processor">Java Optimized Processor</a><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> for <a href="FPGA" class="mw-redirect" title="FPGA">FPGAs</a>. A PhD thesis is <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp">available</a>, and it has been used in several commercial applications.<sup id="cite_ref-Binder_1-2" class="reference"><a href="#cite_note-Binder-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> In 2019 it was extended to be energy aware (EAJOP).<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup></li></ul>
<p>Some commercial implementations included:
</p>
<ul><li>The aJile processor was the most successful <a href="ASIC" class="mw-redirect" title="ASIC">ASIC</a> Java processor.<sup id="cite_ref-Binder_1-3" class="reference"><a href="#cite_note-Binder-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup></li>
<li>Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup></li>
<li><a href="ARM9E" class="mw-redirect" title="ARM9E">ARM926EJ-S</a> was an ARM processor able to run Java bytecode, this technology being named <i><a href="Jazelle" title="Jazelle">Jazelle</a></i>.</li></ul>
<div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2></div>
<ul><li><a href="Java_Card" title="Java Card">Java Card</a></li></ul>
<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>
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</style><cite id="CITEREFBinderSchoeberlMoretVillazon2008" class="citation book cs1">Binder, Walter; Schoeberl, Martin; Moret, Philippe; Villazon, Alex (September 2008). "Cross-Profiling for Embedded Java Processors". <i>2008 Fifth International Conference on Quantitative Evaluation of Systems</i>. pp. <span class="nowrap">287–</span>296. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FQEST.2008.39">10.1109/QEST.2008.39</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-0-7695-3360-5</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:16966639">16966639</a>.</cite></span>
</li>
<li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20170818062055/http://www.systronix.com/">"Systronix Home"</a>. <i>www.systronix.com</i>. Archived from <a rel="nofollow" class="external text" href="http://www.systronix.com/">the original</a> on 18 August 2017<span class="reference-accessdate">. Retrieved <span class="nowrap">6 June</span> 2022</span>.</cite></span>
</li>
<li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><cite id="CITEREFYiyuWanyiuChihangLi2006" class="citation journal cs1">Yiyu, T.; Wanyiu, L.; Chihang, Y.; Li, R.; Fong, A. (2006). "A Java processor with hardware-support object-oriented instructions". <i>Microprocessors and Microsystems</i>. <b>30</b> (8): 469. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1016%2Fj.micpro.2005.12.007">10.1016/j.micpro.2005.12.007</a>.</cite></span>
</li>
<li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><cite id="CITEREFSchoeberl2008" class="citation journal cs1">Schoeberl, M. (2008). "A Java processor architecture for embedded real-time systems". <i>Journal of Systems Architecture</i>. <b>54</b> (<span class="nowrap">1–</span>2): <span class="nowrap">265–</span>286. <a href="CiteSeerX_(identifier)" class="mw-redirect" title="CiteSeerX (identifier)">CiteSeerX</a> <span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.68.8757">10.1.1.68.8757</a></span>. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1016%2Fj.sysarc.2007.06.001">10.1016/j.sysarc.2007.06.001</a>.</cite></span>
</li>
<li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><cite id="CITEREFTewaryMalikSalcicBiglari-Abhari2019" class="citation book cs1">Tewary, Manish; Malik, Avinash; Salcic, Zoran; Biglari-Abhari, Morteza (2019). "An Energy Efficient Embedded Processor for Hard Real-Time Java Applications". <i>Architecture of Computing Systems – ARCS 2019</i>. Lecture Notes in Computer Science. Vol. 11479. pp. <span class="nowrap">281–</span>292. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1007%2F978-3-030-18656-2_21">10.1007/978-3-030-18656-2_21</a>. <a href="Hdl_(identifier)" class="mw-redirect" title="Hdl (identifier)">hdl</a>:<span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://hdl.handle.net/2292%2F62302">2292/62302</a></span>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-3-030-18655-5</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:153311249">153311249</a>.</cite></span>
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<li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text">"Imsys hedges bets on Java: <a href="Microcode#Writable_control_store" title="Microcode"> rewritable-microcode</a> chip has instruction sets for Java, Forth, C/C++"]
by Tom R. Halfhill
<a rel="nofollow" class="external autonumber" href="http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf">[1]</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf">Archived</a> 2008-11-19 at the <a href="Wayback_Machine" title="Wayback Machine">Wayback Machine</a></span>
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